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• #2
@AlexB, did a quick check... do I need do revive my Palm(s)? ...btw, the last Palm models were fully written in JavaScript: A phone that could be hacked just by knowing JS...everything was accessible... of course the kernel was something lower level... but only very small, like a rudimentary linux to connect to hardware - BIOS / basic input output system - but everything else was written in JS...
Looking to get you easy going, I would not go for ESP8266 or ESP32 or alike... first of all, your batteries cannot feed'm... but if you go for a puck or - form fitting - BLE breakout board and you connect over 19k2 serial as offered by Psion as well, you could get really somewhere... (of course, your phone in the back pack / pocket would have to play the hub... or some raspi in the room listening to your BLE...)
A project to publish on Hack THE day with a Psion 3c - I mean hackaday.org.
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• #3
Wow, sounds like a fun project!
I think that's something that would be doable on-chip with an Espruino device, but you may need to carefully craft some C/assembler code to handle the ASIC4 protocol.
As @allObjects says, something like the MDBT42Q boards/modules might be an option. It's not WiFi, but is very low power and would allow you to create a Bluetooth LE connection to a phone/desktop where you could use the phone's WiFi connection and storage?
The nRF52 used for Espruino's Bluetooth boards has some neat tricks up its sleeve too. The on-chip peripherals can be 'glued' together a little like with an FPGA - see http://www.espruino.com/NRF52LL
I'm not sure if it's good enough to use to decode/recreate the 12 bit packets (I doubt it) but it might be handy. It'd be ok if all you needed to do was receive, but handling the transmit side requires a very quick response.
Is the data always clocked out at 3.84MHz? It strikes me that the easiest way to handle it might be to just use Espruino's inline assembler. You could just arrange that your function gets called when the CLK line first changes state, then you could read in or output the bits of data one at a time, just inserting the odd
NOP
(no-operation) command to pad everything out until the 12 bit packet had finished.Realistically in order for you to not go completely insane you're going to need to get a digital storage scope though so you can see what's going on!
... having said all that, small FPGAs are quite cheap (or CPLDs - basically the same but they definitely remember what they were programmed to do when powered off - not all FPGAs do). Decoding 12 bits of data is actually something that would be a really fun and instructive project to do with one of them.
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• #4
I had the original (with the non-qwerty keyboard), the 3, and the 5.
Psions were fabulous machines in their time.
Great idea for a project - good luck.
I have set myself a nightmare of a challenge.
I want to build a device that will add modern storage and Wi-Fi to my ageing but beloved Psion Series 3c. If possible, I want it to fit into the SSD slot of the 3c and power it straight from the 3c.
After doing a lot of research and scavaging for PDFs on Google, I have worked out the basics of how I might go about doing this. I think that the Espruino platform would be perfect for a lot of the "heavy lifting" in this project, and I would like to have either a Pico or an ESP8266 (or both) doing most of the work.
There are a few personal hurdles to overcome - I haven't done any serious programming in well over 10 years (Spectrum BASIC, VB6, PHP, some JavaScript, definitely no C or ASM) and my electronics knowledge is slightly-above-beginner. But the plan is to learn as I go. After all, that's kind of the fun of it, isn't it?
I'm going to ignore the Wi-Fi challenge for the moment and focus on emulating an SSD. My first challenge is to deal with Psion's proprietary serial protocol, known as the SIBO Serial Protocol. This uses a 5v half-duplex two-wire system - CLK and DATA. The 3c controls the clock and sends out 12-bit packets (0-11). Bit 0 and Bit 11 are start and end bits. Sometimes Bits 1 and 2 tell the slave device that it's the slave's turn to send data back on Bits 3-10. On the original SSD modules, this work is done by a proprietary chip called the ASIC4.
Oh, and the 3c's CLK runs at a nominal 3.84 MHz.
I can see three ways of tackling this:
I'm fully aware that this whole project is a bit bonkers. But I don't mind if this takes a long while. For me, although I really want my Psion Series 3c to be able to sync files to Google Drive, this project includes so many things I want to learn about.
So... Thoughts on the serial problem?
Alex