• Kind of - as far as I remember there was no actual description of the core, it was just one C++ file. I guess rather than a CPU designer, it was more of a way of designing hugely pipelined systems (while validating them very quickly by compiling to C).

    Every variable represented a register and you could define how many bits was in each one, and what was attached to them (multiply, add, etc). Then, if you do myvariable = a*b it'd do a multiply using that multiplier (and any maths that you didn't tag would get assigned to the most suitable ALU available, or one would get made).

    While you could just write C, you had to be prepared to look at the reports of hardware utilisation to get something working well - but when you did you could make something really fast and efficient - because you were designing a pipelined system you could get the clock rate right up near the maximum the FPGA could handle, with pretty much full utilisation.

    I wish I could find it now, but I did a quick google and came up blank :(

    It's the kind of thing that'd be really cool now - with that little bit more processing power it could run the compiler in the background and could give you a live update of exactly how your code mapped to hardware.


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