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  • The way that Vgs is specified is by telling you the Rds(on) at a given voltage on the gate (ie, Vgs)

    The graphs with the crazy current numbers (fig 1-3) show the maximum peak current (measured in 20us pulses), with the x axis showing the voltage between drain and source while it's on (ie, the voltage drop across the fet) and carrying the stated amount of current, and the lines represent different gate voltages. You'll notice that at low current, IV relationship is linear; this is the ohmic region, and is where you want your devices operating. As a limiting current is approached, the current nolonger increases as Vds does. You want to stay out of that operating regime.

    That is a beast of a transistor. At Vgs=10, it is spec'ed for 61 amps continuous current. Just a jaw-dropping number, and 31A higher than the package limitation (nice marketing).... At Vgs=3.3, that should be able to handle 20-30 amp loads easy.

    You can get fets with 2.5v gate voltage that can handle 5+ amps in a rice-grain sized SOT-23 package now!

    Uh, for the BJT, I don't understand your question "for the collector/emitter to reach the peak 40v"?

  • That is a beast of a transistor. At Vgs=10, it is spec'ed for 61 amps continuous current.

    I've attached two screenshots of the datasheet that confuse me with what I'm being told about Rds(on) and this maximum peak current... The Rds says the transistor can only handle 15A at 10V but the maximum specs say it can handle 61A at 10V... what does it mean! LOL

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