I'd be pretty sure that SPI is working fine and that the modules are doing the right thing if you can read the register values. The Tx timeout is because the module is sending the data and waiting for a response, but it isn't getting it from what it's sending to.
Can you paste up the code that you used to initialise each module? One module needs to have one address, say:
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I'd be pretty sure that SPI is working fine and that the modules are doing the right thing if you can read the register values. The
Tx timeout
is because the module is sending the data and waiting for a response, but it isn't getting it from what it's sending to.Can you paste up the code that you used to initialise each module? One module needs to have one address, say:
and the other must have the opposite: