External interrupt limitation due to the NVIC

Hi guys,

I was discussing with my colleagues the problem of the NVIC multiplexer within the STm32 (and probably every CortexM) that limits the number of external interrupts.
For example, EXTI1_IRQHandler can be triggered by any pin Px.1 (mutually exclusive) among the available ports, a limitation is therefore that you cannot enable an interrupt simultaneously on PA.1 and PB.1.
Then came Espruino into the discussion, and we wondered how is it possible to do a setWatch on PA.1 in addition to another setWatch on pin PB.1?
If possible, what is the trick? Does Espruino poll the inputs and generate virtual interrupts?