• Sure, it is possible. I do not know the details about the schema, but there are some typical patterns how it is done with 74HC595...

    I assume 3 of the four feed the RGB by cols (or rows) and the fourth controls the commons by rows (or cols).

    You use SPI with write to write 4-byte entities out to the 74HC595 per row (or col), where the first or last byte has only one bit on (or off) that 'selects' the common row (or col). You use the 'nss' pin to latch. You can keep the 'noe' always grounded. The latching defines the cutover.

    Recently I did something like that with 3 x 595 in series/cascaded for 12 7-segment-plus-decimal display hat have segments A...H(H=DP) of all digits in common one one 595 and the common of each digit on one and a half 595.

    Best is to have a buffer of 8 x 8x3-Byte entities (3 for the 24 bit color depth) that you write into (using Espruino Graphics lib), and an independent write in setInterval to update the display - one col (or row) at a time (24 bytes for the RGB plus additional byte with 1 bit on (or off) for the commons of the row (or col)).

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