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There must be more to how the x in SPIx of code maps the n in SPIn of the board description at http://www.espruino.com/ReferenceESPRUINOBOARD, because SPI1 is mentioned twice...
Intuitively from the code and the reference I mistakingly(?) concluded that the SPIx, x=1..3, are just three instances of code SPI, and the setup assigns the actual pins. For sure that is not correct... and for sure the error message wrong or at least fuzzy, but it seems not to be the only thing behind the mapping and the reference of SPI1 twice and SPI3 sharing pins with SP1 for some cases.
A better error message would say something like:
Suitable pins are:
because setup knows obviously for what x it is...
Btw, above message hints that B3 uses a different pin setup than A5... that may be the issue that I'm having in communication with F RAM in post http://forum.espruino.com/conversations/257994
A bit confusing... (not only here but there as well... most likely I did not yet come across the doc that explains the details 'here' as well as 'there').
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@DrAzzy
A5-7 is SPI1, not SPI2.