I have set myself a nightmare of a challenge.
I want to build a device that will add modern storage and Wi-Fi to my ageing but beloved Psion Series 3c. If possible, I want it to fit into the SSD slot of the 3c and power it straight from the 3c.
After doing a lot of research and scavaging for PDFs on Google, I have worked out the basics of how I might go about doing this. I think that the Espruino platform would be perfect for a lot of the "heavy lifting" in this project, and I would like to have either a Pico or an ESP8266 (or both) doing most of the work.
I'm going to ignore the Wi-Fi challenge for the moment and focus on emulating an SSD. My first challenge is to deal with Psion's proprietary serial protocol, known as the SIBO Serial Protocol. This uses a 5v half-duplex two-wire system - CLK and DATA. The 3c controls the clock and sends out 12-bit packets (0-11). Bit 0 and Bit 11 are start and end bits. Sometimes Bits 1 and 2 tell the slave device that it's the slave's turn to send data back on Bits 3-10. On the original SSD modules, this work is done by a proprietary chip called the ASIC4.
Oh, and the 3c's CLK runs at a nominal 3.84 MHz.
I can see three ways of tackling this:
I'm fully aware that this whole project is a bit bonkers. But I don't mind if this takes a long while. For me, although I really want my Psion Series 3c to be able to sync files to Google Drive, this project includes so many things I want to learn about.
So... Thoughts on the serial problem?
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