use RESIZABLE_JSVARS for other boards than linux ?

What I need is enabling block allocation mode but build fw with three precompiled blocks:

So you don't actually need resizable vars with its dynamic memory allocation, you need just 3 fixed separate blocks right from the start. sbrk is method to allocate memory (maybe malloc calls it internally?) - you don't need this to solve your problem?

I don't think there is a solution for this combination but it could be useful. I'd like to have something similar on nrf52 too, currently the most simple way used for nrf52 and stm32 is (one) big static jsVars array which is put randomly somewhere by the linker just like any static variable. What I used before with nrf52 is to put it into fixed memory area - not malloc'ed but also not static array variable. What you want is advanced variation of this with 3 blocks. it could be implemented like RESIZABLE_JSVARS blocks but still fixed and all 3 created at startup instead of allocating dynamically.

PS: I take old 2v22 thus modern versions compiles into ELF file with broken LMA/VMA table but I don't have time to fix it (all source code debug info bounded to zero address etc)

That looks related to your previous conversation https://forum.espruino.com/conversations/401187/
There is nothing wrong at having the code linked to address 0. It is not broken as already explained there. If for some reason you want to have it at 0x08000000 it is possible and was described there how to do that - the NUCLEOF401RE board uses such configuration.

I just compiled STM32F4DISCOVERY target which is linked to address zero too and in the lst file I see

bin/espruino_2v25.20_stm32f4discovery.elf:     file format elf32-littlearm
bin/espruino_2v25.20_stm32f4discovery.elf
architecture: armv7e-m, flags 0x00000112:
EXEC_P, HAS_SYMS, D_PAGED
start address 0x00000c01

Program Header:
    LOAD off    0x00001000 vaddr 0x00000000 paddr 0x00000000 align 2**12
         filesz 0x0006cf90 memsz 0x0006cf90 flags r-x
    LOAD off    0x0006e000 vaddr 0x20000000 paddr 0x0006cf90 align 2**12
         filesz 0x0000011c memsz 0x00012c5c flags rw-
private flags = 0x5000200: [Version5 EABI] [soft-float ABI]

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .isr_vector   00000188  00000000  00000000  00001000  2**0
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  1 .ARM          00000008  00000188  00000188  00001188  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  2 .text         0006ce00  00000190  00000190  00001190  2**3
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  3 .data         0000011c  20000000  0006cf90  0006e000  2**3
                  CONTENTS, ALLOC, LOAD, DATA
  4 .bss          00012b3c  20000120  0006d0b0  0006e11c  2**3
                  ALLOC
  5 .ARM.attributes 0000002e  00000000  00000000  0006e11c  2**0
                  CONTENTS, READONLY

and it looks like both VMA and LMA are correct, they point to 0 where the code really is, so there is nothing to fix with VMA/LMA. If you still have some issue with that, then maybe continue in that previous conversation you created.