Tutorial example output anomaly using low level access PPI on MDBT42Q breakout board

Wed 2020.03.04

This is a first attempt at attempting to grasp the concepts behind PPI using nRF52. I am at a point where peppering the NRF52LL.js module with console.log() statements is/will be the next step in revealing the PPI mysteries.

PPI - the "Programmable Peripheral Interconnect". This allows you to 'wire' peripherals together internally.
nRF52 Low Level Interface Library

Example code heading: 'Use the RTC to measure how long a button has been held down for'

http://www.espruino.com/NRF52LL

Scenario: Onboard button is held down (at L10) for approx one second. Output shows the counter (L11) value. A clear command is issued, but the counter continues to output what appears to be an overflow (L12-L14) value, despite the button never being pressed a subsequent time.

 2v03 (c) 2018 G.Williams
Espruino is Open Source. Our work is supported
only by sales of official boards and donations:
http://espruino.com/Donate
>
8763371
0
0
0
0
37785
163827
163831
163827
>

I added a few console.log() statements to the example code block, that show the counter increments around twelve times for each console.log() statement that is executed, even after the counter is cleared.

 2v03 (c) 2018 G.Williams
Espruino is Open Source. Our work is supported
only by sales of official boards and donations:
http://espruino.com/Donate
>
>
5739316
0
0
0
 
0
0
0
0
 
0
0
0
0
 
98636
7
19
31
 
163832
7
19
31
 
163822
9
20
32
 
163823
7
19
31
 
>ci()
=undefined
>

Q1: What is the counter frequency? (presumeably 32Khz)

Q2: Clarification needed:

The datasheet indicates two external crystals, but the schematic shows none. I presume a software generated clock, 32Mhz?/64Mhz? but unsure what the frequency actually is, that is used to determine the clocking here. Several references to 32Khz, but that is 1000 times slower than xtal.

Spec

p.550 shows two 32Mhz xtals

p.103 19.2 LFCLK clock controller
32Mhz

L10 comment: // no prescaler, 32 kHz

From module:
cc3stop : true, // if cc[0] matches, stop the timer

Q:3 L14 indicates on an up that rtc.tStop should occur. After the clear, shouldn't the clock stop and therefore no additional counting?

163822
Q4: What is this value? (total counter edges?)

From the L10 comment above 32K is 32 000 but 163 822 is five times that value

I'm choosing not to upgrade to 2v04 just yet, as PPI example existed prior to 2V03

>process.env
={
  VERSION: "2v03",
  GIT_COMMIT: "e77d74f6",
  BOARD: "MDBT42Q",

Will continue to read/filter through spec.

Modified example to reveal counter changes and ci() function to halt output

//http://www.espruino.com/NRF52LL
//Use the RTC to measure how long a button has been held down for
var ll = require("NRF52LL");
// Source of events - the button
// Note: this depends on the polarity of the physical button (this assumes that 0=pressed)
var btnu = ll.gpiote(0, {type:"event",pin:BTN,lo2hi:1,hi2lo:0});
var btnd = ll.gpiote(1, {type:"event",pin:BTN,lo2hi:0,hi2lo:1});
// A place to recieve Tasks - the RTC
var rtc = ll.rtc(2);
poke32(rtc.prescaler, 0); // no prescaler, 32 kHz
poke32(rtc.tStop, 1); // ensure RTC is stopped
// Set up and enable PPI to start and stop the RTC
ll.ppiEnable(0, btnd.eIn, rtc.tStart);
ll.ppiEnable(1, btnu.eIn, rtc.tStop);
// Every so often, check the RTC and report the result
setInterval(function() {
  print(peek32(rtc.counter));
  poke32(rtc.tClear, 1);
  print(peek32(rtc.counter));
  print(peek32(rtc.counter));
  print(peek32(rtc.counter)); 
  print("    ");
}, 5000);
function ci() { clearInterval(); }

Reference Links

NRF52LL Module source

http://www.espruino.com/modules/NRF52LL.js

nRf52 spec

https://infocenter.nordicsemi.com/pdf/nRF52832_PS_v1.1.pdf

MDBT42Q breakout board schematic

https://github.com/espruino/EspruinoBoard/blob/master/MDBT42/pdf/mdbt42q_breakout_sch.pdf