I want to build a device that will add modern storage and Wi-Fi to my ageing but beloved Psion Series 3c. If possible, I want it to fit into the SSD slot of the 3c and power it straight from the 3c.
After doing a lot of research and scavaging for PDFs on Google, I have worked out the basics of how I might go about doing this. I think that the Espruino platform would be perfect for a lot of the "heavy lifting" in this project, and I would like to have either a Pico or an ESP8266 (or both) doing most of the work.
There are a few personal hurdles to overcome - I haven't done any serious programming in well over 10 years (Spectrum BASIC, VB6, PHP, some JavaScript, definitely no C or ASM) and my electronics knowledge is slightly-above-beginner. But the plan is to learn as I go. After all, that's kind of the fun of it, isn't it?
I'm going to ignore the Wi-Fi challenge for the moment and focus on emulating an SSD. My first challenge is to deal with Psion's proprietary serial protocol, known as the SIBO Serial Protocol. This uses a 5v half-duplex two-wire system - CLK and DATA. The 3c controls the clock and sends out 12-bit packets (0-11). Bit 0 and Bit 11 are start and end bits. Sometimes Bits 1 and 2 tell the slave device that it's the slave's turn to send data back on Bits 3-10. On the original SSD modules, this work is done by a proprietary chip called the ASIC4.
Oh, and the 3c's CLK runs at a nominal 3.84 MHz.
I can see three ways of tackling this:
Completely emulate the ASIC4 on Espruino. This would be my preferred way of doing it. But would the Espruino platform be fast enough to cope with this speed? I'm guessing pure JavaScript would be nowhere near fast enough to handle it, so a driver would need to be written in C.
Use an original ASIC4 chip. They're not too difficult to get hold of (there are SSDs popping up all the time on eBay), but there is a finite supply. I would need to remove the chip from an SSD (not quite at that level of soldering skill yet). And finally I would need to work out how to get a Pico to either talk to an ASIC4.
Emulate the ASIC4 in FPGA. This scares me the most. I haven't got a clue about FPGAs. However, I know it would be insanely fast and mean that I wouldn't have to break SSDs. Still, I'd need to work out how to get Espruino to talk to the FPGA.
I'm fully aware that this whole project is a bit bonkers. But I don't mind if this takes a long while. For me, although I really want my Psion Series 3c to be able to sync files to Google Drive, this project includes so many things I want to learn about.
Espruino is a JavaScript interpreter for low-power Microcontrollers. This site is both a support community for Espruino and a place to share what you are working on.
I have set myself a nightmare of a challenge.
I want to build a device that will add modern storage and Wi-Fi to my ageing but beloved Psion Series 3c. If possible, I want it to fit into the SSD slot of the 3c and power it straight from the 3c.
After doing a lot of research and scavaging for PDFs on Google, I have worked out the basics of how I might go about doing this. I think that the Espruino platform would be perfect for a lot of the "heavy lifting" in this project, and I would like to have either a Pico or an ESP8266 (or both) doing most of the work.
There are a few personal hurdles to overcome - I haven't done any serious programming in well over 10 years (Spectrum BASIC, VB6, PHP, some JavaScript, definitely no C or ASM) and my electronics knowledge is slightly-above-beginner. But the plan is to learn as I go. After all, that's kind of the fun of it, isn't it?
I'm going to ignore the Wi-Fi challenge for the moment and focus on emulating an SSD. My first challenge is to deal with Psion's proprietary serial protocol, known as the SIBO Serial Protocol. This uses a 5v half-duplex two-wire system - CLK and DATA. The 3c controls the clock and sends out 12-bit packets (0-11). Bit 0 and Bit 11 are start and end bits. Sometimes Bits 1 and 2 tell the slave device that it's the slave's turn to send data back on Bits 3-10. On the original SSD modules, this work is done by a proprietary chip called the ASIC4.
Oh, and the 3c's CLK runs at a nominal 3.84 MHz.
I can see three ways of tackling this:
I'm fully aware that this whole project is a bit bonkers. But I don't mind if this takes a long while. For me, although I really want my Psion Series 3c to be able to sync files to Google Drive, this project includes so many things I want to learn about.
So... Thoughts on the serial problem?
Alex