The antique, home made 'pricy' LED Matrix 3x5x1 w*h*c (c=color depth) has 3 Cols have common Anode, 5 rows have common Cathode. (Ignore The diodes DCR0...DCR4 in the row line.) [0..3,0..4] are the (red)
LEDs w/ coordinate [0,0] in top left corner. The character graphic below shows the matrix:
--- EDIT --- NOTE that this 'passive' setup of the display matrix applies time multiplexing approach where a few lines only drive many LEDs, on (row or column of) LED(s) after the other in a fast, barely noticeable fashion (The Charliplexing needs even less lines because it takes diodes into account so same col/row driven with reverse voltage lights up (a) different LED(s)). Time multiplexing takes advantage of the fact that the human eye perceives a light as continuously on even though it is pulsed... the pulsing has just to be fast enough... the same concept that movies take advantage of: sufficient frames per second so the observer perceives transitions as smooth and flowing...
The schema includes the option for having 3 LEDs - RGB - for each 'pixel'. Just check when you want to use RGB LEDs - 4 pins - that you observe the common cathode (or anode).
Even though my matrix has only 1 color, the wiring-up with the 595 is for 3 colors in sequence BGR, R the LSB (only every 3rd output of cascaded 595 is connected to a R(ed) C(ol) of LEDs (when thinking of RGB LEDs w/ col lines LED bundled). The 595s are cascaded from left to right:
1st 595 will drain (0V) the rows - one at the time
2nd and 3rd will source (3.3V) the cols - all 3 cols at once
For simplicity of the code, the cols and rows use their own 595(s). Horizontally, two more row RGB LEDs can be added (using the 15 lower outputs of the 16). Vertically, two more row RGB LEDs can be added (using all 8 ouputs.
3 x M74HC595 8-bit shift register w/ latched three state output - pins and description below:
_________________________
74HC595 Shift-Register with Latching 3-state Output Registers
- 14 SI Serial In 15 QA
- 11 /SCK Schift Clock 1 QB
- 12 /RCK Register Clock 2 QC
- 13 -G Output Enable (PWM brightness) 3 QD
- 9 QH' H Stage for cascaded/next SI 4 QE
- 10 -SCLR Shift Register Clear (CR Reset) 5 QF
- 8 GND Ground 6 QG
- 16 VCC +2..+6V 7 QH
- QA..H stringed/cascaded together to source/drain:
- columns (16 bits w/ 16clocks) and then
- rows (8 bits w/ 8clocks)
Basic operation:
shift out columns of one row (padded/trailed to fill gap)
shift out rows with only on row low (padded/trailed)
/RCK latch (shows data)
Attached picture shows the Espruino-Wifi wired up with 3 cascaded SN74HC595 and the LED matrix. Note that same pins of the 595 are all connected together - EXCEPT the SERial input (pin 14) of the first one which get's the SPI1 SDA line, and passes the bits on with it's output H' output (pin 9) to second 595's SERial input (pin 14)... and so does the second pass the bits on with it's H' output (pin 9) to third 595's SERial input (pin 14). In other words shift register serial data is daisy chained.
Quite a fiddeling thing so many bread board wires... Luckily, I could keep the colors consistent, in other words, same color same 595 pin - except for the SERial data. All 595 outputs are brought into the front row creating the gap between the 595s for the outout A (pin 15), orange wire.
blue is the daisy chaining SERial data, and white is the SERial clock. Yellow (Espruino-WiFi A0) is the NNS pin that is automatically pulled down by the SPIX.write() for writing and the pulling back up after the writing it serves the RCLK / raising flank to latch the data into the output registers. Green (A1) is holding the _OutputEnable down. It is able to PWN and can be used to PWM the output to protect LEDs from over-duty (when a LED driver stage is added to have more brighness / mA than the 595 can source and sink...
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This post looks at the hard ware and wires it up.
The antique, home made 'pricy' LED Matrix 3x5x1 w*h*c (c=color depth) has 3 Cols have common Anode, 5 rows have common Cathode. (Ignore The diodes DCR0...DCR4 in the row line.) [0..3,0..4] are the (red)
LEDs w/ coordinate [0,0] in top left corner. The character graphic below shows the matrix:
--- EDIT --- NOTE that this 'passive' setup of the display matrix applies time multiplexing approach where a few lines only drive many LEDs, on (row or column of) LED(s) after the other in a fast, barely noticeable fashion (The Charliplexing needs even less lines because it takes diodes into account so same col/row driven with reverse voltage lights up (a) different LED(s)). Time multiplexing takes advantage of the fact that the human eye perceives a light as continuously on even though it is pulsed... the pulsing has just to be fast enough... the same concept that movies take advantage of: sufficient frames per second so the observer perceives transitions as smooth and flowing...
The schema includes the option for having 3 LEDs - RGB - for each 'pixel'. Just check when you want to use RGB LEDs - 4 pins - that you observe the common cathode (or anode).
Even though my matrix has only 1 color, the wiring-up with the 595 is for 3 colors in sequence BGR, R the LSB (only every 3rd output of cascaded 595 is connected to a R(ed) C(ol) of LEDs (when thinking of RGB LEDs w/ col lines LED bundled). The 595s are cascaded from left to right:
For simplicity of the code, the cols and rows use their own 595(s). Horizontally, two more row RGB LEDs can be added (using the 15 lower outputs of the 16). Vertically, two more row RGB LEDs can be added (using all 8 ouputs.
3 x M74HC595 8-bit shift register w/ latched three state output - pins and description below:
Basic operation:
Attached picture shows the Espruino-Wifi wired up with 3 cascaded SN74HC595 and the LED matrix. Note that same pins of the 595 are all connected together - EXCEPT the SERial input (pin 14) of the first one which get's the SPI1 SDA line, and passes the bits on with it's output H' output (pin 9) to second 595's SERial input (pin 14)... and so does the second pass the bits on with it's H' output (pin 9) to third 595's SERial input (pin 14). In other words shift register serial data is daisy chained.
Quite a fiddeling thing so many bread board wires... Luckily, I could keep the colors consistent, in other words, same color same 595 pin - except for the SERial data. All 595 outputs are brought into the front row creating the gap between the 595s for the outout A (pin 15), orange wire.
blue is the daisy chaining SERial data, and white is the SERial clock. Yellow (Espruino-WiFi A0) is the NNS pin that is automatically pulled down by the SPIX.write() for writing and the pulling back up after the writing it serves the RCLK / raising flank to latch the data into the output registers. Green (A1) is holding the _OutputEnable down. It is able to PWN and can be used to PWM the output to protect LEDs from over-duty (when a LED driver stage is added to have more brighness / mA than the 595 can source and sink...
To be continued...
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