Peeking at Espruino Board Timers 2, 3, 4, and 5

Using Poke to Do PWM on Pins A0, A1, A2, and A3
Before trying to configure a timer into other modes of operation using poke commands, it would be useful to configure a timer using a known configuration created by the command analogWrite(A0,0.2,{ freq : 50 });
A known configuration:
If we modify isTimerEnabled3.js lines 168 thru 172 to read:

analogWrite(A0,0.2,{ freq : 50 }); 
//analogWrite(A1,0.4,{ freq : 50 }); 
//analogWrite(A2,0.6,{ freq : 50 }); 
//analogWrite(A3,0.8,{ freq : 10 });
The output for timer 5 is:
Timer 5 Enabled
CR1=81
CR2=0
SMCR=0
DIER=0
SR=3
EGR=0
CCMR1=68
CCMR2=0
CCER=1
CNT=cbe9
PSC=15
ARR=ffae
CCR1=3322
CCR2=0
CCR3=0
CCR4=0
DCR0
DMAR=81

The attached file PokeA0Timer5a.js contains the code to implement pins A0, A1, A2, A3 on timer 5 using poke commands. Note that either powering the board off or using the reset button will clear the timer settings.
First setup the pins for alternate function output:

//setup pins A0, A1, A2, A3
A0.mode('af_output');
A1.mode('af_output');
A2.mode('af_output');
A3.mode('af_output');

Next turn timer 5 on and reset it

//timer 5 clock
var RCCbase=0x40021000;
var APB1ENR=RCCbase+0x1c;
var APB1RST=RCCbase+0x10;
var APB2ENR=RCCbase+0x18;
//turn on timer 5 clock
 poke8(APB1ENR,(peek8(APB1ENR)&0xf7)|0x08);
//reset timer 5
 poke8(APB1ENR,(peek8(APB1RST)&0xf7)|0x08);
 poke8(APB1ENR,(peek8(APB1RST)^0x08));

Finally configure timer 5 and enable it

//disable timer 5
  poke32(TIM5+CR1,0x80);
//setup timer 5
  poke32(TIM5+ARR,0x0ffae);
//Setup duty cycle values
  poke32(TIM5+CCR1,0x3322); //A0 duty cycle
  poke32(TIM5+CCR2,0x3322); //A1 duty cycle
  poke32(TIM5+CCR3,0x3322); //A2 duty cycle
  poke32(TIM5+CCR4,0x3322); //A3 duty cycle
//setup CCMR1 and 2
//poke32(TIM5+CCMR1,0x68); //A0
  poke32(TIM5+CCMR1,0x6868);//A0,A1
//poke32(TIM5+CCMR2,0x68);//A3
  poke32(TIM5+CCMR2,0x6868);//A3,A4
//Setup PSC prescaler
poke16(TIM5+PSC,0x6d);
//Connect timer output to pins
//poke32(TIM5+CCER,0x0001); //A0
//poke32(TIM5+CCER,0x0011); //A0,A1
//poke32(TIM5+CCER,0x0111); //A0,A1,A2
poke32(TIM5+CCER,0x1111); //A0,A1,A2,A3
//Preload timer
poke32(TIM5+EGR,1);
//Enable timer 5
poke32(TIM5+CR1,0x81); //10Hz
//poke32(TIM5+CR1,0x41); //5Hz
//poke32(TIM5+CR1,0x01); //10Hz

Note the frequency is determined by the ARR, and PSC registers and can be modified by the CR1 register.
Additionally the frequency depends on the clock chain see Figure 8 on page 92 of the RM0008 Reference manual. The register APB1 controls the prescaler for timers 2, 3 , 4, 5, 6, 7, 12, 13, and 14. The register APB2 controls the prescaler for timers 1, 8, 9, 10, and 11.

The CCMR1 and CCMR2 registers configure the CC (capture/compare) pins of the timer as output or input on one of three sources.

The CCER register configures the polarity and enable that connects to the pins A0..A3.

1 Attachment

• PokeA0Timer5a.js