Over/Underclocking?

VMs everywhere: OS, memory, and now clock... thanks for the 'engenius' work. Next step is built in auto-speed-setting, depending on the sleep - javascript idle - Espruino experiences. Similar to cloud elasticity - expand and shrink capacity on demand - Espruino has an elastic clock or elastic power saving... and I know, over time auto-init of timing based things will 'sneak in' (after all, Espruino 'know' what is currently running of the clock and how it is running of the clock).

Indeed:

absolutely nothing stops us making chip-specific modules with useful xyz feature...

PS: slightly paraphrased.

Regarding:

...but you'll be stepping it quite a lot before you see much happen on the pins!

Triggering a stop by a GPIO and and some external hardware could overcome that - initialization and 'go to the point of interest'. On the other hand no real value to it, because there is none of the bus and control lines externalized for watching... and single-clock-tick-stepping in time driven communication is a mute point... For a clocked communication, it could be interesting, but (external) device constraint may mute it as well.