• Hi there !

    thanks !
    I did see this & sent myself a mail to digg it, but yet didn't took the time to even watch the video ..
    .. and I just did: this tool seems pretty cool, especially when I saw the code tab pop ;)

    'll have to digg that too :)

    nb: I'd love to see some algo that organizes the mess left once you've done some concluding tests with the FPGA used ( not personally a fan of "linked nodes" UIs, but maybe it's caused by some known nib builder .. ;p )


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