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Espruino is a JavaScript interpreter for low-power Microcontrollers. This site is both a support community for Espruino and a place to share what you are working on.
@allObjects
Noticed the root post just now that asks about how to make things faster 'beyond what compiled can do'...
I understant that it is a bit late in the life cycle of the event object, but I'd like still to know how came the decision to store the lasttime in it vs the time ago value (e.time-e.lastTime). Most of the time - and especially in this one - the ago is of interest... and if lasttime is needed, it can be derived.
May be it is a mute (muet) pong, since in a compiled mode the calculation is not a big deal...
@DrAzzy, regarding a higher level of communication - detect the begin of a packet and wether the node address is a match - and especially to unburded the application MPU from that low level job, I 'm thinking a bit in a different direction:
A 'large' shiftregister with some 'comparison logic' - a FPA or dedicated satellite mPU - triggering an IRQ - like a signal processor. Large means 4+ number of the bits involved and a the comparison logic is a fast, 'hardware' based, somehwat fuzzy comparator to detect a proper packet header - pre-amble with address and some CRC. The 'bit' - noise - is sampled and streamed through the device with 5+ the defined baud rate. Since the signal processor is so fast, is able to go for every fast cycle through all 5+ and consider it a hit or fail, and trigger the flag. The large array can then switch over for the reception of the package to be the fifo and give the host MPU enough time to respond to the IRQ. The 'modulation' or coding would be like a '5 com bit per 1 data bit' communiction, where the first one is always the start bit and more so - a pulse, and the 3rd and 4th bits define the actual data bit - the 2nd and 5th are always idle (an 1 data-bit is a 10100 singnal sequence and a 0 bit is a 10010 sequence). The baud rate for the payload goes down, but pattern is combnatin af asynchronous and synchronous and triggered, detection is state and transition based, and only 2 out of 32 make it to be a valid bit.