faster spiFlashWriteByte

Works for me. Ubuntu + Chrome too. Ctrl+V ?
Aaargh. Yes. I right-clicked and saw no paste option.

Triggered by the comments in your code snippet I decided to sync with the latest version and measure again

Indeed now unrolling also fails for me. Looking at the assembly the whole function spiFlashRead is inlined in jshFlashRead.
In the non-unrolled version the loop reading the bits looks like:

45782:       2108            movs    r1, #8
   45784:       2200            movs    r2, #0
   45786:       f8c3 c508       str.w   ip, [r3, #1288] ; 0x508
   4578a:       f8d3 4510       ldr.w   r4, [r3, #1296] ; 0x510
   4578e:       f8c3 c50c       str.w   ip, [r3, #1292] ; 0x50c
   45792:       f3c4 5400       ubfx    r4, r4, #20, #1
   45796:       3901            subs    r1, #1
   45798:       ea44 0242       orr.w   r2, r4, r2, lsl #1
   4579c:       d1f3            bne.n   45786 <jshFlashRead+0x72>

I stripped off the source as they were misleading.
The first two lines are not part of the loop, r1 is the loop counter, r2 is where the results go to.
7 instructions in the loop (including the branch)

After unrolling the following 5 instructions are executed to read a bit

p_reg->OUTSET = set_mask;
   457c4:       f8c3 1508       str.w   r1, [r3, #1288] ; 0x508
   457c8:       ea42 0244       orr.w   r2, r2, r4, lsl #1
    return p_reg->IN;
   457cc:       f8d3 4510       ldr.w   r4, [r3, #1296] ; 0x510
    p_reg->OUTCLR = clr_mask;
   457d0:       f8c3 150c       str.w   r1, [r3, #1292] ; 0x50c
    return ((nrf_gpio_port_in_read(reg) >> pin_number) & 1UL);
   457d4:       f3c4 5400       ubfx    r4, r4, #20, #1

After that there is another write to set the clk high (write to reg OUTSET (0x508)

I suspect that things fail because the clock down time is too short.
The data sheet of the NRF specifies a value of 25 ns for a 50 pF load. The minimum clock down time needed by the flash chip we do not know.
Guess there is not much more to be gained here.