In order to use P0.09 and P0.10 as GPIOs (requires to "cut" the NFC antenna in order to remove the intrinsic short circuit made by the antenna), one must write into NFCPINSregister (addr offset 0x20C) the value 0x00000000 in order to disable NFC on those pins. (ref: http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52832.ps.v1.1/uicr.html#register.NFCPINS )
On STM32 chips there are peek/poke functions for register access. What about the NRF52?
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In order to use P0.09 and P0.10 as GPIOs (requires to "cut" the NFC antenna in order to remove the intrinsic short circuit made by the antenna), one must write into
NFCPINS
register (addr offset 0x20C) the value0x00000000
in order to disable NFC on those pins. (ref: http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52832.ps.v1.1/uicr.html#register.NFCPINS )On STM32 chips there are peek/poke functions for register access. What about the NRF52?